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FPGA Donanımı için Tek Taramalı Bağlantılı Bileşen Etiketlemenin Uygulanması

Year 2025, Volume: 7 Issue: 1, 12 - 21

Abstract

Görüntü işleme dijital görüntüyü işleyip analiz ederek belirli bilgileri çıkarmayı ve nesnelerin tanımlanmasını hedefleyen bilgisayar bilimidir. Görüntüleme sistemleri günümüzde tıp, savunma sanayi, güvenlik, otomotiv ve otomasyon alanları başta olmak üzere hayatımızın her alanında yer almaktadır. Bundan dolayı görüntünün belirlenen amaçlar doğrultusunda işlenmesi gerekmektedir. Blob tespiti görüntü işlemede nesne tanıma, algılama için kullanılan bir kavramdır ve görüntüdeki bir nesnenin sınırlarını belirleyen bir grup pikseli ifade eder. Blob analizi için farklı algoritmalar geliştirilmiştir. Bu algoritmalardan birisi görüntü işlemede yaygın olarak kullanılan ve amacı bir nesneye ait tüm piksellere aynı etiketi atamak olan bağlantılı bileşen etiketleme algoritmasıdır. Bu çalışmada görüntüdeki nesnelerin tespiti için bağlantılı bileşen etiketleme algoritması FPGA yapısı üzerinde uygulanmak üzere hazırlanmış ve simülasyon ortamında test edilmiştir. Bir görüntü karesinin tamamının aynı anda işlenmesi bellek kaynakları açısından verimsiz olduğundan dolayı görüntü satır satır okunup işlenmiştir. Görüntü karesinden tek geçişte her piksel etiketlenmiş ve bağlantılı pikseller birleştirilerek her blobun alanı, sınırları ve ağırlık merkezi hesaplanmıştır. Bu şekilde PL-PS yapılarının bir arada kullanılmasına imkân sağlayacak CCL algoritmasının uygulanması için altyapı sağlanmıştır. İlerde yapılacak çalışmalarda blob tespiti işlemi ZYNQ yapısının PS ve PL kısımlarına uygulanarak verimli bir sistem geliştirilmesi hedeflenmektedir.

References

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Implementation of Single-Scan Connected Component Labeling for FPGA Hardware

Year 2025, Volume: 7 Issue: 1, 12 - 21

Abstract

Image processing is a branch of computer science that tries to extract information and identify objects from digital photographs through processing and analysis. Today, imaging systems are used in almost every aspect of our lives, particularly in medicine, the defense industry, security, automobile, and automation. As a result, the image must be processed in accordance with the intended purposes. Blob detection is a concept used in image processing to recognize and detect objects. It refers to a group of pixels that define the borders of an object in the image. Blob analysis algorithms vary. One of these techniques is the linked component labeling algorithm, which is commonly used in image processing and assigns the same label to all pixels of an object. In this study, the connected component labeling algorithm for detecting objects in the image was prepared to be implemented on the FPGA structure and tested in a simulation environment. Since processing a full image frame at once is inefficient in terms of memory resources, the image was read and processed line by line. Each pixel was labeled in a single pass through the image frame, and the area, boundaries, and centroid of each blob were determined by combining the corresponding pixels. This provides the foundation for the application of the CCL algorithm, allowing the use of PL-PS structures together. Future research will focus on constructing an efficient system that applies the blob identification procedure to the PS and PL components of the ZYNQ structure.

References

  • M. Kowalczyk, T. Kryjak, A Connected Component Labelling algorithm for a multi-pixel per clock cycle video stream, içinde: 24th Euromicro Conference on Digital System Design (DSD), Palermo, Italy, 2021, 43-50.
  • A. Ünlü, İ. İlhan, A novel hybrid gray wolf optimization algorithm with harmony search to solve multi-level image thresholding problem, Necmettin Erbakan University Journal of Science and Engineering. 5(2) (2023), 230- 245. doi:10.47112/neufmbd.2023.21
  • N.G. Şengöz, F. Zeybek, Sharp Silhouettes for Obtaining 3D Body Measurements from 2D Images, Necmettin Erbakan University Journal of Science and Engineering. 4(2) (2022), 8-25.
  • F. Özen, R. Ortaç Kabaoğlu, T.V. Mumcu, Deep learning based temperature and humidity prediction, Necmettin Erbakan University Journal of Science and Engineering, 5(2) (2023), 219-229. doi:10.47112/neufmbd.2023.20
  • L. He, X. Ren, Q. Gao, X. Zhao, B. Yao, Y. Chao, The connected-component labeling problem: A review of state-of-the-art algorithms, Pattern Recognition. 70 (2017), 25-43. doi:10.1016/j.patcog.2017.04.018
  • B. Aissou, A. Aissa, An adapted connected component labeling for clustering non-planar objects from airborne lidar point cloud, Volume XLIII-B2-2020: The International Archives of the Photogrammetry, Remote Sensing and Spatial Information Sciences (ISPRS), 2020, pp:191–195.
  • D. Jaiswal, P. Kumar, Real-time implementation of moving object detection in UAV videos using GPUs, Journal of Real-Time Image Process. 17 (2019), 1301–1317, doi:10.1007/s11554-019-00888-5
  • A. A. Kalinin, V. I. Iglovikov, A. Rakhlin, A. A. Shvets, Medical Image Segmentation Using Deep Neural Networks with Pre-trained Encoders. In: M. Wani, M. Kantardzic, M. Sayed-Mouchaweh, (eds) Deep Learning Applications. Advances in Intelligent Systems and Computing, Springer Singapore, 2020: pp. 39–52 doi: 10.1007/978-981-15-1816-4_3
  • V. S. N. Virothi, M. S. Janapareddy, Signature Extraction Using Connected Component Labeling. In: S.C. Satapathy, V. Bhateja, M. Ramakrishna Murty, N. Gia Nhu, Jayasri Kotti (eds) Communication Software and Networks. Lecture Notes in Networks and Systems, Springer, Singapore, 2021: pp. 619-629 doi: 10.1007/978-981-15-5397-4_62.
  • C. Zhao, G. Duan, N. Zheng, A Hardware-Efficient method for extracting statistic ınformation of connected component, Journal of Signal Processing Systems. 88 (2016), 55–65. doi:10.1007/s11265-016-1126-5
  • C. Zhao, W. Gao, F. Nie, A memory-efficient hardware architecture for connected component labeling in embedded system, IEEE Transactions on Circuits and Systems for Video Technology. 30 (2019), 3238–3252. doi:10.1109/tcsvt.2019.2937189
  • L. He, Y. Chao, K. Suzuki, A run-based two-scan labeling algorithm, IEEE Transactions on Image Processing. 17(5) (2008), 749-756. doi: 10.1109/TIP.2008.919369
  • H. Zhou, R. Dou, L. Cheng, J. Liu, N. Wu, A provisional labels-reduced, real-time connected component labeling algorithm for edge hardware, IEEE Transactions on Circuits and Systems II: Express Briefs. 69(6) (2022), 2997-3001. doi: 10.1109/TCSII.2022.3152783
  • A. AbuBaker, R. Qahwaji, S. Ipson and M. Saleh, One Scan Connected Component Labeling Technique, IEEE International Conference on Signal Processing and Communications, Dubai, United Arab Emirates, 2007, 1283-1286
  • J.-W. Jeong, G.-B. Lee, M.-J. Lee, J.-G. Kim, A single-pass connected component labeler without label merging period, Journal of Signal Processing Systems. 84 (2015), 211–223. doi:10.1007/s11265-015-1048-7
  • C. T. Johnston, D. G. Bailey, FPGA implementation of a Single Pass Connected Components Algorithm, 4th IEEE International Symposium on Electronic Design, Test and Applications, Hong Kong, China, 2008, 228-231
  • N. Ma, D. G. Bailey and C. T. Johnston, Optimised single pass connected components analysis, International Conference on Field-Programmable Technology, Taipei, Taiwan, 2008, 185-192.
  • J. Trein, A. Th. Schwarzbacher, and B. Hoppe, FPGA implementation of a single pass real-time blob analysis using run length encoding, MPC-Workshop, Ravensburg-Weingarten, Germany, (2008).
  • K. Wu, E. Otoo, K. Suzuki, Optimizing two-pass connected-component labeling algorithms, Pattern Analysis and Applications. 12 (2008) 117–135. doi:10.1007/s10044-008-0109-y.
  • L. He, Y. Chao, K. Suzuki, K. Wu, Fast connected-component labeling, Pattern Recognition. 42(9) (2009), 1977-1987. doi:10.1016/j.patcog.2008.10.013
  • L. He, X. Zhao, Y. Chao, K. Suzuki, Configuration-transition-based connected-component labeling, IEEE Transactions on Image Processing. 23(2) (2014), 943-951. doi:10.1109/TIP.2013.2289968
  • A. Alkan, T. Selcuk, A. S. Çolakoğlu, Görüntü işleme teknikleri kullanılarak ekmek doku analizi ve arayüz programının oluşturulması, Journal of the Faculty of Engineering and Architecture of Gazi University. 33(1) (2018), 31-41. doi: 10.17341/gazimmfd.406777
  • C. Grana, D. Borghesani, P. Santinelli, R. Cucchiara, High Performance Connected Components Labeling on FPGA, Workshops on Database and Expert Systems Applications, Bilbao, Spain, 2010, 221-225.
  • J. G. Pandey, A. Karmakar, A. K. Mishra, C. Shekhar and S. Gurunarayanan, Implementation of an İmproved Connected Component Labeling Algorithm Using FPGA-based Platform, International Conference on Signal Processing and Communications (SPCOM), Bangalore, India, 2014, 1-6.
  • C. Zhao, W. Gao and F. Nie, A resource-efficient parallel connected component labeling algorithm and its hardware implementation, IEEE Transactions on Multimedia. 23 (2021), 4184-4197. doi: 10.1109/TMM.2020.3037511.
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  • MathWorks, Inc., Streaming Pixel Interface, https://www.mathworks.com/help/visionhdl/ug/streaming-pixel-interface.html (Access 18 March 2024)
There are 28 citations in total.

Details

Primary Language English
Subjects Image Processing, Embedded Systems
Journal Section Articles
Authors

İsmail Yabanova 0000-0001-8075-3579

Tarık Ünler 0000-0002-2658-1902

Early Pub Date January 9, 2025
Publication Date
Submission Date May 13, 2024
Acceptance Date July 15, 2024
Published in Issue Year 2025 Volume: 7 Issue: 1

Cite

APA Yabanova, İ., & Ünler, T. (2025). Implementation of Single-Scan Connected Component Labeling for FPGA Hardware. Necmettin Erbakan Üniversitesi Fen Ve Mühendislik Bilimleri Dergisi, 7(1), 12-21.
AMA Yabanova İ, Ünler T. Implementation of Single-Scan Connected Component Labeling for FPGA Hardware. NEJSE. January 2025;7(1):12-21.
Chicago Yabanova, İsmail, and Tarık Ünler. “Implementation of Single-Scan Connected Component Labeling for FPGA Hardware”. Necmettin Erbakan Üniversitesi Fen Ve Mühendislik Bilimleri Dergisi 7, no. 1 (January 2025): 12-21.
EndNote Yabanova İ, Ünler T (January 1, 2025) Implementation of Single-Scan Connected Component Labeling for FPGA Hardware. Necmettin Erbakan Üniversitesi Fen ve Mühendislik Bilimleri Dergisi 7 1 12–21.
IEEE İ. Yabanova and T. Ünler, “Implementation of Single-Scan Connected Component Labeling for FPGA Hardware”, NEJSE, vol. 7, no. 1, pp. 12–21, 2025.
ISNAD Yabanova, İsmail - Ünler, Tarık. “Implementation of Single-Scan Connected Component Labeling for FPGA Hardware”. Necmettin Erbakan Üniversitesi Fen ve Mühendislik Bilimleri Dergisi 7/1 (January 2025), 12-21.
JAMA Yabanova İ, Ünler T. Implementation of Single-Scan Connected Component Labeling for FPGA Hardware. NEJSE. 2025;7:12–21.
MLA Yabanova, İsmail and Tarık Ünler. “Implementation of Single-Scan Connected Component Labeling for FPGA Hardware”. Necmettin Erbakan Üniversitesi Fen Ve Mühendislik Bilimleri Dergisi, vol. 7, no. 1, 2025, pp. 12-21.
Vancouver Yabanova İ, Ünler T. Implementation of Single-Scan Connected Component Labeling for FPGA Hardware. NEJSE. 2025;7(1):12-21.


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